PIC18F2450-I/ML【PDF 6/241 页】IC PIC MCU FLASH 8KX16 28QFN

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103

XMEGA A [MANUAL]

8077I–AVR–11/2012

8.7

Register Description – Power Reduction

8.7.1

PRGEN – General Power Reduction register

Bit 7 – Reserved

This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero when this

Bit 6 – Reserved

This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero when this

Bit 5 – Reserved

This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero when this

Bit 4 – AES: AES Module

Setting this bit stops the clock to the AES module. When this bit is cleared, the peripheral should be reinitialized to

ensure proper operation.

Bit 3 – EBI: External Bus Interface

Setting this bit stops the clock to the external bus interface. When this bit is cleared, the peripheral should be reinitialized

to ensure proper operation.

Bit 2 – RTC: Real-Time Counter

Setting this bit turns off the peripheral clock to the RTC. This means that register access, interrupt generation and event

generation is stopped, but the counter will continue to run.

Bit 1 – EVSYS: Event System

Setting this stops the clock to the event system. When this bit is cleared, the module will continue as before it was

stopped.

Bit 0 – DMA: DMA Controller

Setting this bit stops the clock to the DMA controller. This bit can be set only if the DMA controller is disabled.

8.7.2

PRPA/B – Power Reduction Port A/B register

Note:

Disabling of analog modules stops the clock to the analog blocks themselves and not only the interfaces.

Bit 7:3 – Reserved

These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to zero

when this register is written.

Bit

76543210

+0x00

–

AES

EBI

RTC

EVSYS

DMA

Read/Write

R/W

Initial Value

00000000

Bit

765

+0x01/+0x02

–

DAC

ADC

Read/Write

R/W

Initial Value

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